In light of the trend to smaller and smaller-sized electronics devices, conventional discrete circuits are narrowly fabricated into a silicon-based or GaAs-based wafer using integrated circuits technology. The advent of the ULSI era in chip density has forced a radical upgrading of semiconductor processing technology. An integrated circuit chip itself is fragile and very tiny in dimension. There is a desire, for practical applications, to “wrap it up” thus isulating it from external force or environmental factors, which may cause the chip to be electrically or physically damaged. Meanwhile, it is needed to connect the chip to other external circuits to make the circuits combined with on-chip and off-chip circuits, forming a device to perform a specific function. This technology, “electronic packaging”, puts these two needs into realization, which not only makes the chip properly located and well-connected to the external circuits, but also forms connections between the chip and external circuits.
Objectives of the IC chips packaging designs are not only to provide a substantial lead system, physical protection, environmental protection, but also to provide a heatsink for the chip.
For the present, electronic products have a trend to be becoming slighter and smaller. To satisfy the above requirements, integrated circuit technologies have been progressing in producing high-density, high-speed, high-capacity and light chips. The increasing power dissipation from on-chip circuits arouses an issue the IC is over-heated, which would make some electronic components walk off the range which they may always feature at normal temperature. Some components have changes in their properties, and some, even, get damaged perpetually. There is an expectation to deal with such a heat-spreading problem in packaging technology as the increase on speed of the current IC packages.
FIG. 1 shows a conventional package which includes a substrate 2, a die 4 formed on the substrate via die attach epoxy 6. The die is electrically connected to the substrate 2 through gold wire bonds 8. Solder balls 10 for signal transfer are formed on the bottom surface of the substrate 2. Molding compound 12 is used to cap the die 4 and gold wire bonds 8 for protection purpose. Heat from the die 4 is spread by using thermal vias 14 in the substrate 2 and thermal balls 16 connected to the thermal vias 14. However, the heat generated by components in the die is increased due to the increasing packaging density. This also causes the conventional package to fail to satisfy the future demands.
As the semiconductor production continuously grows, many structures of packages are suggested. Among them, a plastic molded package can be found, as described in U.S. Pat. No. 5,586,010. Another structure of package is disclosed in U.S. Pat. No. 5,629,835 to Mahulikar et al., entitled “METAL BALL GRID ARRAY PACKAGE WITH IMPROVED THERMAL CONDUCTIVITY”.
For the present, conventional packages such as SOP and PQFP-type packages are not able to further increase the number of the lead frames around them. For the sake of more lead frames, the current packaging technology has turned to BGA-type packages. The BGA package is featurized by its spherical I/O-functioned leads, which are shorter, and hence operate with higher speed, and are not apt to become deformed. Therefore, the BGA packaging is well-suited for the future packaging topology. The spherical leads of the BGA are arranged as an array, but not circumferentially about the package as conventional lead frames are. Consequently, the BGA can readily increase the spherical balls on it. Coupled with the larger pitches, the BGA are a rather competitive candidate as considered a current and future packaging type.
Many proposals for an improved heat-spreader equipped BGA package are put forth. For example, kinds of heat slugs, heat sinks in any shape are attached to packages or packaging structures to improve the efficiency of spreading heat from packages.
FIG. 2 shows the package in the prior art 2. Two wings of the heat spreader 32′ is fixed on the substrate 20′ by a soft material, and thus the heat spreader 32′ is well supported. Then the substrate 20′ and the heat spreader 32′ is sealed with molding compound 30′ but the top side of the heat spreader 32′ exposed. Actually, there are many holes (not shown) through the heat spreader 32′, and molding compound 30′ is driven into the heat spreader 32′ therethrough. Unfortunately, there may be defects on the molding compound 30′ (e.g., some air may be left in the molding compound) which would make the thermally conductive paths between the molding compound 30′ and the heat spreader 32′ discontinuous. The heat resistance between them is thus raised making the efficiency of heat spreading poor. Additionally, two wings of the heat spreader 32′ are sealed within the molding compound 30′ but only the top surface at the center of the heat spreader 32′ is exposed to the ambient, which further worsens efficiency.
With the increase in speed of current and future integrated circuits, the current heat-spreading mechanisms are expected to be further improved. To settle the problem of heat spread in a package, the present invention suggests two structures with high-performance capability of spreading heat from a package, which are different from those in prior art as to their fabrication processes and structures.